Modeling and designing of Sense Amplifier based Flip-Flop using Cadence tool at 45nm

نویسندگان

  • Akhilesh Tiwari
  • Shyam Akashe
چکیده

Today to compete the race of improvements and advancements of technological mysteries are lasting upon innovative ideas and noble thoughts. The consequences of using normal Master-Slave Flip-flops in ultra high speed circuits are increase in cycle time, blurredness in clock edge / skew, higher crosstalk / substrate coupling/power consumption/ expensive packaging including cooling systems and limiting performance. An innovative idea of Sense amplifier based Flip-flops (SAFF) has been implemented which can be speedup the processes up to optimum rate (i.e. Shannon Rate) with compensated SNR. To save the Time Element, designed prototype model to be operated, with ultra high speed for error detection and performance evaluation. Referred to authors previous paper, Modeling and design optimization of Latch Circuits using Parametric Timing Analysis, the latch circuits were thoroughly analyzed w.r.t. their operating speed and its effect over various parameters was discussed, in tighter timing constraints needs to concentrate on power dissipation and durability of device. Overlooking of setup and hold times spans, pays a heavy cost of compromise in the circuits with various latch-ups inducted during design, testing and quality check phase. In sense amplifierflip-flop (SAFF) based structures, delay can be fairly minimized between the latest point of data arrival and output transition using hybrid latch flip-flop (HLFF) and semidynamic flip-flop (SDFF). SAFF based latch models, consists of the sense amplifier in the first stage and the RS latch in the second stage which are being implemented and simulated by using the Cadence Spectre design tool using 45nm technology. It senses the true and complementary differential inputs and produces monotonous transitions from high to low logic or vice-versa outputs for S-R Latch following the leading clock edge. The S-R latch captures each transition and holds the state until the next leading clock edge arrives, due to this feature; the whole structure becomes a self sustaining flip-flop device.

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تاریخ انتشار 2017